🇮🇳 UPSC ESE E&T · subject
UPSC ESE E&T Electronics Engineering Syllabus
Every chapter and topic of Electronics Engineering examined in UPSC ESE E&T — 3 chapters, 15 topics, plus 51 flashcards written against it.
Electronics Engineering syllabus — full chapter and topic list
Expand any chapter to see its topics and sub-topics. This is the whole examinable outline for Electronics Engineering in UPSC ESE E&T, not a summary of it.
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Basic Electronics Engineering
5 topics- Diodes
- Transistors
- Operational Amplifiers
- Oscillators
- Voltage Regulators
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Digital Electronics
6 topics- Number Systems
- Logic Gates
- Flip-Flops
- Counters
- Shift Registers
- Microprocessors and Microcontrollers
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Analog Electronics
4 topics- Small Signal Analysis
- Large Signal Analysis
- Feedback Amplifiers
- Power Amplifiers
Electronics Engineering flashcards for UPSC ESE E&T
24 of 51 cards from the Electronics Engineering deck — real questions with worked answers.
What is the threshold (cut-in) voltage for a silicon and a germanium PN-junction diode?
Silicon ≈ 0.7 V; Germanium ≈ 0.3 V. Below this forward voltage the diode conducts negligibly.
State the Shockley diode equation relating diode current to applied voltage.
I = I_S (e^(V/(ηV_T)) − 1), where I_S is reverse saturation current, η is the ideality factor (1–2), and V_T = kT/q ≈ 26 mV at room temperature.
How does a Zener diode operate and what is its main application?
It is operated in reverse breakdown, where voltage stays nearly constant despite current changes. Main use: voltage regulation/reference.
Differentiate Zener breakdown from Avalanche breakdown in diodes.
Zener breakdown occurs in heavily doped junctions at low voltage (<5–6 V) due to strong field tunneling and has a negative temperature coefficient. Avalanche occurs in lightly doped junctions at higher voltage via carrier multiplication (impact ionization) and has a positive temperature coefficient.
For a full-wave bridge rectifier with sinusoidal input, give the ripple factor and rectification efficiency.
Ripple factor ≈ 0.48; maximum rectification efficiency ≈ 81.2%. (Half-wave: ripple factor 1.21, efficiency 40.6%.)
In a full-wave center-tapped rectifier, what is the Peak Inverse Voltage (PIV) across each diode?
PIV = 2V_m (twice the peak of one half of the secondary), whereas in a bridge rectifier PIV = V_m.
What are the three operating regions of a BJT and the junction bias conditions for each?
Active: emitter junction forward-biased, collector junction reverse-biased. Saturation: both junctions forward-biased. Cutoff: both junctions reverse-biased.
Define the BJT current gains α and β and give the relationship between them.
α = I_C/I_E (common-base gain, <1); β = I_C/I_B (common-emitter gain). Relationship: β = α/(1−α) and α = β/(1+β).
Compare the three BJT amplifier configurations (CE, CB, CC) in terms of gain and impedance.
CE: high voltage & current gain, medium input/output impedance, 180° phase shift. CB: high voltage gain, current gain <1, low input/high output impedance. CC (emitter follower): voltage gain ≈1, high current gain, high input/low output impedance — used for buffering.
What distinguishes a JFET, a depletion-MOSFET, and an enhancement-MOSFET?
JFET: always normally-ON, controlled by reverse-biased gate. Depletion MOSFET: normally-ON, works in both depletion and enhancement. Enhancement MOSFET: normally-OFF, conducts only when |V_GS| exceeds threshold V_T.
Write the MOSFET drain current equation in saturation (active) region.
I_D = (1/2) μ_n C_ox (W/L)(V_GS − V_T)^2 (1 + λ V_DS), often written I_D = K(V_GS − V_T)^2.
List the ideal characteristics of an operational amplifier.
Infinite open-loop gain, infinite input impedance, zero output impedance, infinite bandwidth, infinite CMRR, zero offset voltage, and zero input bias current.
What are the two 'golden rules' of an ideal op-amp in negative feedback?
1) No current flows into either input terminal (infinite input impedance). 2) The voltage difference between the two inputs is zero — the 'virtual short' (V+ = V−).
Give the closed-loop gain of an inverting and a non-inverting op-amp amplifier.
Inverting: A = −R_f/R_1. Non-inverting: A = 1 + R_f/R_1.
Define CMRR for an op-amp and give its expression.
Common-Mode Rejection Ratio = ratio of differential gain to common-mode gain: CMRR = A_d/A_cm, usually expressed in dB as 20 log10(A_d/A_cm). Higher is better.
What is the slew rate of an op-amp and how does it limit performance?
Slew rate = maximum rate of change of output voltage (V/µs), SR = dV_out/dt|max. It limits the maximum frequency for a given output amplitude (full-power bandwidth f = SR/(2πV_peak)).
State the Barkhausen criterion for sustained oscillations.
Loop gain magnitude |Aβ| = 1 and total phase shift around the loop = 0° (or 360°). Together they sustain oscillations at the desired frequency.
Give the frequency of oscillation for a Wien-bridge oscillator (equal R and C).
f = 1/(2πRC), with the amplifier gain set to ≥3 to satisfy Barkhausen criterion.
Give the frequency of oscillation and gain condition for an RC phase-shift oscillator.
f = 1/(2πRC√6); the amplifier must provide a gain of at least 29 to overcome the feedback network attenuation.
Give the oscillation frequency for Hartley and Colpitts LC oscillators.
Both: f = 1/(2π√(LC_eq)). Hartley uses tapped inductors (L = L1+L2+2M), Colpitts uses series capacitors (C = C1C2/(C1+C2)).
For a Zener shunt voltage regulator, what condition keeps the Zener in regulation?
The Zener current must remain between I_Z(min) and I_Z(max) for all input voltage and load current variations; load voltage stays at V_Z.
Define line regulation and load regulation of a voltage regulator.
Line regulation = change in output voltage per unit change in input voltage (ΔV_out/ΔV_in). Load regulation = change in output voltage per unit change in load current (ΔV_out/ΔI_load). Lower values mean better regulation.
How does a series-pass linear regulator differ from a switching regulator in efficiency?
Linear (series-pass) regulators dissipate excess voltage as heat → low efficiency (~30–60%). Switching regulators rapidly switch a transistor and use LC filtering → high efficiency (~80–95%).
Convert the binary number 1011 to decimal.
1011₂ = 8 + 0 + 2 + 1 = 11₁₀.
Planning Electronics Engineering for UPSC ESE E&T
Electronics Engineering is about 25% of the UPSC ESE E&T syllabus by topic count — 15 of 60 topics, spread over 3 chapters. At roughly 45 minutes per topic plus 12 minutes per sub-topic, a first pass runs to about 10 hours.
The heaviest chapters are Digital Electronics (6 topics), Basic Electronics Engineering (5 topics), Analog Electronics (4 topics) . Front-load those while your energy is high; the short chapters are better revision filler later.
Work top-down: read the chapter, then tick topics off individually rather than marking the whole chapter done. Sub-topics are where silent gaps hide.
Electronics Engineering (UPSC ESE E&T) FAQ
What is in the UPSC ESE E&T Electronics Engineering syllabus?
Electronics Engineering is split into 3 chapters — Basic Electronics Engineering, Digital Electronics and Analog Electronics, containing 15 topics and 0 sub-topics in total.
How is Electronics Engineering structured in the UPSC ESE E&T syllabus?
3 chapters. Electronics Engineering accounts for about 25% of the topics in the whole UPSC ESE E&T syllabus (15 of 60).
How long should I spend on Electronics Engineering for UPSC ESE E&T?
Budget around 10 hours for a first pass through Electronics Engineering — about 45 minutes per topic plus 12 minutes per sub-topic across its 15 topics. Add revision cycles on top.
Are there flashcards for UPSC ESE E&T Electronics Engineering?
Yes — a 51-card Electronics Engineering deck. Sample cards are printed on this page, and the full deck is free in the Examius app with spaced repetition scheduling.