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GATE CS & IT Engineering Compiler Design Flashcards
50 question-and-answer cards covering Compiler Design as it is examined in GATE CS & IT Engineering. 24 of them are printed below, taken from across the deck — no signup, no paywall on the preview.
24 sample cards from the Compiler Design deck
Sampled from the end of the deck, so these are different cards from the ones shown on the syllabus page.
In liveness analysis, after computing fixed point, $OUT[B] = \{a, b\}$ and $B$ contains only $c = a + 1$. What is $IN[B]$?
$def[B] = \{c\}$, $use[B] = \{a\}$. $IN[B] = use[B] \cup (OUT[B] - def[B]) = \{a\} \cup (\{a,b\} - \{c\}) = \{a, b\}$.
What distinguishes a 'live' variable from a 'reaching' definition conceptually?
Liveness is a backward analysis about future uses of a variable's value; reaching definitions is a forward analysis about which definitions of a variable may reach a point. They are dual in direction and ask different questions.
What is common subexpression elimination (CSE)?
CSE is an optimization that detects expressions computed more than once with the same operand values, and replaces redundant recomputations by reusing the previously computed result (stored in a temporary).
When is an expression $x\ op\ y$ called a common subexpression at a point?
It is a common subexpression if it was previously computed, and the values of $x$ and $y$ have not changed (no redefinition of $x$ or $y$) since that previous computation — so the earlier result is still valid.
What is an 'available expression', and how does it relate to CSE?
An expression $e$ is available at point $p$ if on every path from entry to $p$, $e$ has been computed and none of its operands redefined afterward. Available-expressions analysis identifies expressions safe to reuse, which is the basis for global CSE.
What are the direction and meet operator of available-expressions analysis?
Available expressions is a forward data-flow analysis with set intersection ($\cap$) as the meet operator (a 'must' analysis — available on all paths).
State the data-flow equations for available expressions.
$$OUT[B] = e\_gen[B] \cup (IN[B] - e\_kill[B])$$ $$IN[B] = \bigcap_{P \in pred(B)} OUT[P]$$ with $IN[\text{ENTRY}] = \varnothing$ and all other $OUT$ initialized to the universal set $U$.
In available-expressions analysis, what do $e\_gen[B]$ and $e\_kill[B]$ mean?
$e\_gen[B]$ is the set of expressions evaluated in $B$ and not subsequently killed in $B$ (their operands not redefined afterward in $B$); $e\_kill[B]$ is the set of expressions whose operands are redefined (killed) in $B$.
Why is the initialization for available expressions the universal set $U$ (not empty) for interior blocks?
Because it is a 'must' / intersection analysis: to find the maximum fixed point, interior $OUT$ sets start optimistically as the full universe $U$ and shrink via intersection. Starting empty would give the trivial all-empty (least) solution incorrectly.
Distinguish local CSE from global CSE.
Local CSE eliminates redundant expressions within a single basic block (using a value/expression table during a single pass). Global CSE works across basic blocks using available-expressions data-flow analysis over the whole CFG.
How is a common subexpression eliminated once detected? Show the transformation.
Replace the first occurrence $t = b + c;\ x = t$ and a later redundant $y = b + c$ with $y = t$. A temporary $t$ holds the value: instead of recomputing $b+c$, reuse $t$ (provided $b, c$ unchanged).
What is the difference between common subexpression elimination and copy propagation?
CSE removes redundant computations of the same expression by reusing a stored result; copy propagation replaces uses of a variable $y$ with $x$ after a copy $y = x$. CSE often introduces temporaries/copies that copy propagation then cleans up.
Why can CSE sometimes increase register pressure or even degrade performance?
Storing a reused value in a temporary keeps it live across the gap between computations, lengthening live ranges and possibly forcing spills. If recomputation is cheaper than holding the value in a register, CSE can be counterproductive.
What role does a Directed Acyclic Graph (DAG) play in local common subexpression elimination?
A DAG representation of a basic block shares identical subexpressions as a single node; when building it, an existing node is reused instead of created, automatically detecting and eliminating local common subexpressions.
What is the difference between syntactic (lexical) and value-based (semantic) common subexpressions?
Syntactic CSE matches expressions textually (same operator and same operand names). Value-based CSE (e.g., value numbering / GVN) matches expressions that compute the same value even if written differently, catching more redundancies.
What is value numbering and how does it support CSE?
Value numbering assigns a unique number to each computed value; expressions that map to the same value number are equivalent. It detects common subexpressions (and constants/copies) by hash-lookup, forming a powerful basis for CSE.
Compare the meet operators and what they imply for available expressions vs. live variables.
Available expressions uses intersection ($\cap$, must/all-paths, forward); live variables uses union ($\cup$, may/some-path, backward). The meet reflects whether a property must hold on all paths or may hold on some path.
Fill the four-way classification: for (Reaching Definitions, Available Expressions, Live Variables, Busy/Anticipated Expressions), give direction and meet.
Reaching Definitions: forward, $\cup$. Available Expressions: forward, $\cap$. Live Variables: backward, $\cup$. Busy (Very Busy/Anticipated) Expressions: backward, $\cap$.
Is available-expressions analysis a 'may' or 'must' analysis, and what does that guarantee for CSE safety?
It is a 'must' analysis (intersection). This guarantees the expression's value is available on every path reaching the point, so reusing the precomputed result is always safe (sound).
In available expressions, block $B$ computes $t = b + c$ and does not redefine $b$ or $c$ afterward. What is $e\_gen[B]$ for this expression?
$e\_gen[B] = \{\,b + c\,\}$, since $b + c$ is evaluated in $B$ and its operands are not killed afterward within $B$.
If an expression $b + c$ is available at a point but $b$ is redefined just before, is $b + c$ still available? Explain.
No. Redefining $b$ kills $b + c$ (it is in $e\_kill$), so the previously computed value is stale. The expression must be recomputed; it is not safe for CSE at that point.
What is the key practical reason all three—constant propagation, liveness, and CSE—are framed as data-flow analyses?
They all compute facts that hold along control-flow paths by solving iterative fixed-point equations over a lattice. The unifying monotone data-flow framework (direction, meet, transfer functions) lets the same iterative algorithm solve each, differing only in lattice, direction, and meet.
Why does liveness analysis converge to a unique fixed point with the iterative algorithm?
Because the transfer functions are monotone over a finite lattice (bounded variable set) and sets only grow (for union/may analysis). Monotonicity plus finite height guarantees termination at the maximum fixed point, which is unique.
Give one example each where constant propagation, liveness, and CSE respectively reduce executed work.
Constant propagation: replaces $r = n \times 1$ with $r = n$ after folding, removing a multiply. Liveness: removes a dead assignment $t = a + b$ whose $t$ is never used. CSE: replaces a second $b + c$ with a stored temporary $t$, removing a redundant addition.
What this deck covers
The Compiler Design deck follows the GATE CS & IT Engineering Compiler Design syllabus — 7 chapters and 3 topics — so questions land on material that is genuinely examinable rather than trivia around it. That works out to roughly 7.1 cards per chapter.
Answers are written to be recallable, not just readable — averaging about 211 characters, which is long enough to carry the reasoning and short enough to say out loud.
A deck like this earns its keep on the second and third pass. Read the syllabus first so you know the shape of the subject, then use the cards to find the specific facts that have not stuck.
Compiler Design flashcards FAQ
How many Compiler Design flashcards are in this GATE CS & IT Engineering deck?
50 cards. This page previews 24 of them, sampled evenly across the deck so you can judge the difficulty before installing anything.
Are these GATE CS & IT Engineering flashcards free?
Yes. The preview here is free to read with no signup, and the full 50-card deck is free inside the Examius app.
What do the Compiler Design cards cover?
They follow the GATE CS & IT Engineering Compiler Design syllabus — 7 chapters and 3 topics — so the questions track what is actually examinable.
How should I use these flashcards?
Read the syllabus first so you know the shape of the subject, then drill the deck. Examius schedules each card with spaced repetition, so cards you keep missing come back sooner and ones you know drift further apart.