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Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering Syllabus
The Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering syllabus for Chartered Membership of the IET (CEng MIET) in full: 4 chapters, 18 topics and 31 sub-topics, every one listed below, plus 51 Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering flashcards with answers.
Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering syllabus: all 4 chapters
Expand any chapter to see its topics and sub-topics.
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Electrical Engineering Fundamentals
4 topics- Circuit theory and network analysis
- Kirchhoff's laws, Thevenin and Norton equivalents
- AC steady-state analysis, phasors and complex impedance
- Three-phase systems, power factor and reactive power
- Electromagnetism and energy conversion
- Magnetic circuits and transformers
- Rotating machines: induction and synchronous
- Power electronics and motor drives
- Power systems and the grid
- Generation, transmission and distribution
- Fault analysis and protection coordination
- Grid integration of renewables and storage
- Control systems and stability
- Circuit theory and network analysis
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Electronic Engineering and Devices
5 topics- Analogue electronics
- Semiconductor devices and operating regions
- Amplifier topologies and feedback
- Filters, oscillators and signal conditioning
- Digital electronics and logic design
- Combinational and sequential logic
- FPGAs and hardware description languages
- Embedded systems and microcontrollers
- Architecture, peripherals and interrupts
- Real-time constraints and firmware design
- Signal processing and instrumentation
- Sensors, transducers and measurement uncertainty
- Analogue electronics
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Information Technology, Software and Communications
5 topics- Computer systems and architecture
- Processor, memory hierarchy and I/O
- Operating systems and concurrency
- Software engineering principles
- Requirements, architecture and design patterns
- Lifecycle models: agile, iterative and V-model
- Verification, validation and testing
- Networking and telecommunications
- OSI and TCP/IP layered models
- Wireless, optical and cellular transmission
- Cyber security fundamentals
- Confidentiality, integrity, availability
- Secure-by-design and threat modelling
- Data engineering, AI and machine learning concepts
- Computer systems and architecture
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Underpinning Mathematics, Science and Emerging Technology
4 topics- Engineering mathematics in practice
- Differential equations and transforms
- Linear algebra and numerical methods
- Probability, statistics and reliability theory
- Materials and physics for engineering applications
- Awareness of developments in the discipline
- Electrification, net zero and energy transition
- Internet of Things and connected systems
- Quantum, photonics and advanced computing trends
- Applying scientific principles to engineering problems
- Engineering mathematics in practice
Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering flashcards — 51 questions with answers
State Ohm's law and the formula for instantaneous power dissipated in a resistor.
Ohm's law: $V = IR$. Power dissipated: $P = VI = I^{2}R = \dfrac{V^{2}}{R}$.
What is Kirchhoff's Current Law (KCL) and Kirchhoff's Voltage Law (KVL)?
KCL: the algebraic sum of currents entering a node is zero, $\sum I = 0$ (charge conservation). KVL: the algebraic sum of voltages around any closed loop is zero, $\sum V = 0$ (energy conservation).
State Thevenin's theorem and how to find the Thevenin equivalent of a linear two-terminal network.
Any linear two-terminal network can be replaced by a single voltage source $V_{th}$ in series with a resistance $R_{th}$. $V_{th}$ is the open-circuit voltage; $R_{th}$ is the resistance seen from the terminals with independent sources nulled (voltage sources shorted, current sources opened).
For a series RLC circuit, give the resonant angular frequency and the quality factor.
Resonant frequency: $\omega_{0} = \dfrac{1}{\sqrt{LC}}$. Quality factor: $Q = \dfrac{\omega_{0}L}{R} = \dfrac{1}{R}\sqrt{\dfrac{L}{C}}$. Bandwidth $\Delta\omega = \dfrac{\omega_{0}}{Q}$.
Define the impedance of an inductor and a capacitor in the frequency domain.
Inductor: $Z_{L} = j\omega L$. Capacitor: $Z_{C} = \dfrac{1}{j\omega C} = -\dfrac{j}{\omega C}$. Resistor: $Z_{R} = R$.
State the maximum power transfer theorem for a DC source with internal resistance.
Maximum power is delivered to the load when the load resistance equals the source (Thevenin) resistance, $R_{L} = R_{th}$. At this point the efficiency is only $50\%$.
Write Faraday's law of electromagnetic induction and Lenz's law.
Faraday: $\mathcal{E} = -N\dfrac{d\Phi}{dt}$, where $\Phi$ is magnetic flux and $N$ the number of turns. The minus sign is Lenz's law: the induced EMF opposes the change in flux that produces it.
State the force on a current-carrying conductor in a magnetic field and the Lorentz force on a charge.
Conductor: $\vec{F} = I\,\vec{L}\times\vec{B}$, magnitude $F = BIL\sin\theta$. Charge: $\vec{F} = q(\vec{E} + \vec{v}\times\vec{B})$.
For an ideal transformer, relate voltages, currents and turns ratio.
$\dfrac{V_{p}}{V_{s}} = \dfrac{N_{p}}{N_{s}} = \dfrac{I_{s}}{I_{p}}$. Power is conserved: $V_{p}I_{p} = V_{s}I_{s}$. Impedance reflects as $Z_{p} = \left(\dfrac{N_{p}}{N_{s}}\right)^{2} Z_{s}$.
Define energy stored in an inductor and in a capacitor.
Inductor: $W = \dfrac{1}{2}LI^{2}$. Capacitor: $W = \dfrac{1}{2}CV^{2}$.
In three-phase systems, relate line and phase quantities for star (Y) and delta connections.
Star: $V_{L} = \sqrt{3}\,V_{ph}$, $I_{L} = I_{ph}$. Delta: $V_{L} = V_{ph}$, $I_{L} = \sqrt{3}\,I_{ph}$. Three-phase power: $P = \sqrt{3}\,V_{L}I_{L}\cos\phi$.
Define real, reactive and apparent power, and the power factor.
Apparent: $S = V_{rms}I_{rms}$ (VA). Real: $P = S\cos\phi$ (W). Reactive: $Q = S\sin\phi$ (VAR). Power factor: $\text{pf} = \cos\phi = \dfrac{P}{S}$. Relation: $S = \sqrt{P^{2}+Q^{2}}$.
Why is electrical power transmitted at high voltage over the grid?
For a given power $P=VI$, raising $V$ lowers $I$, and line losses scale as $I^{2}R$. Halving current quarters the resistive loss, so high voltage minimizes transmission losses (and conductor size).
What is the standard UK grid frequency and nominal low-voltage supply, and name one method of grid reactive-power/voltage support.
UK grid frequency is $50\ \text{Hz}$; nominal LV supply is $230\ \text{V}$ (single-phase RMS). Reactive support methods include capacitor banks, synchronous condensers, and FACTS devices (e.g. STATCOM).
State the transfer function form and define poles and zeros.
$H(s) = \dfrac{N(s)}{D(s)}$. Zeros are roots of the numerator $N(s)=0$; poles are roots of the denominator $D(s)=0$. Pole locations determine stability and transient response.
What is the condition for BIBO stability of a continuous-time LTI system in terms of poles?
All poles of the transfer function must lie strictly in the left half of the $s$-plane (i.e. $\operatorname{Re}(s)<0$). Any pole in the right half-plane, or repeated poles on the imaginary axis, gives instability.
Give the standard second-order system transfer function and define its parameters.
$H(s) = \dfrac{\omega_{n}^{2}}{s^{2} + 2\zeta\omega_{n}s + \omega_{n}^{2}}$, where $\omega_{n}$ is the natural frequency and $\zeta$ the damping ratio. $\zeta<1$ underdamped, $\zeta=1$ critically damped, $\zeta>1$ overdamped.
State the gain margin and phase margin stability criterion from a Bode plot.
Gain margin is the amount gain can increase before instability, measured at the phase-crossover frequency (where phase $=-180^{\circ}$). Phase margin is the extra phase lag at the gain-crossover frequency (where $|H|=0\ \text{dB}$). Positive margins indicate a stable closed loop.
Write the PID controller equation and state the effect of each term.
$u(t) = K_{p}e(t) + K_{i}\!\int_{0}^{t} e(\tau)\,d\tau + K_{d}\dfrac{de(t)}{dt}$. P reduces error/speeds response, I eliminates steady-state error, D adds damping/anticipation (reduces overshoot).
What does the Nyquist stability criterion test?
It relates closed-loop stability to encirclements of the point $-1+j0$ by the open-loop frequency response $G(j\omega)H(j\omega)$. For an open-loop-stable system, no encirclement of $-1$ means the closed loop is stable.
Show the other 31 Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering flashcards
Give the ideal op-amp gain for inverting and non-inverting amplifier configurations.
Inverting: $A_{v} = -\dfrac{R_{f}}{R_{in}}$. Non-inverting: $A_{v} = 1 + \dfrac{R_{f}}{R_{in}}$. Both assume ideal op-amp (infinite gain, infinite input impedance, virtual short).
List the ideal op-amp assumptions ('golden rules').
Infinite open-loop gain, infinite input impedance (no input current, $I_{+}=I_{-}=0$), zero output impedance, infinite bandwidth. With negative feedback the inputs are at the same voltage (virtual short): $V_{+}=V_{-}$.
Define gain-bandwidth product and slew rate for an op-amp.
Gain-bandwidth product (GBP) is the constant product of closed-loop gain and bandwidth: $\text{GBP} = A_{v}\times f_{BW}$. Slew rate is the maximum rate of change of output voltage, $\text{SR} = \left.\dfrac{dV_{out}}{dt}\right|_{\max}$ (V/$\mu$s).
Compare BJT and MOSFET as switching/amplifying devices.
BJT is current-controlled ($I_{C}=\beta I_{B}$), has lower input impedance and a $\approx0.7\ \text{V}$ base-emitter drop. MOSFET is voltage-controlled (gate voltage), has very high input impedance, no static gate current, and is preferred for low-power and high-density digital logic.
Convert the binary number $1011_{2}$ to decimal and to hexadecimal.
$1011_{2} = 8+0+2+1 = 11_{10} = \text{B}_{16}$.
State De Morgan's theorems in Boolean algebra.
$\overline{A\cdot B} = \overline{A} + \overline{B}$ and $\overline{A + B} = \overline{A}\cdot\overline{B}$. NAND/NOR can implement any logic function (functional completeness).
Distinguish combinational and sequential logic, and give an example of each.
Combinational logic output depends only on present inputs (e.g. multiplexer, adder, decoder). Sequential logic output depends on inputs and stored state, requiring memory/clocking (e.g. flip-flop, counter, register).
What is the difference between a latch and a flip-flop?
A latch is level-sensitive (transparent while the enable is asserted). A flip-flop is edge-triggered, changing state only on a clock edge (rising or falling), which makes synchronous design more predictable.
State the Nyquist-Shannon sampling theorem.
To reconstruct a signal without aliasing, the sampling frequency must exceed twice the highest frequency present: $f_{s} > 2 f_{max}$. The limit $f_{s}/2$ is the Nyquist frequency; signals above it alias.
Define the Z-transform and its role in digital signal processing.
$X(z) = \sum_{n=-\infty}^{\infty} x[n] z^{-n}$. It is the discrete-time analogue of the Laplace transform, used to analyse stability and frequency response of discrete LTI systems; a causal system is stable if all poles lie inside the unit circle $|z|<1$.
Compare FIR and IIR digital filters.
FIR (finite impulse response) has no feedback, is always stable, and can be exactly linear-phase, but needs more taps. IIR (infinite impulse response) uses feedback, achieves a sharp response with fewer coefficients, but can be unstable and is generally non-linear-phase.
Define the Discrete Fourier Transform (DFT) and the speed advantage of the FFT.
$X[k] = \sum_{n=0}^{N-1} x[n] e^{-j 2\pi k n / N}$. Direct DFT costs $\mathcal{O}(N^{2})$ operations; the FFT computes the same result in $\mathcal{O}(N\log N)$.
In an embedded microcontroller, distinguish polling, interrupts and DMA for handling I/O.
Polling: CPU repeatedly checks a status flag (simple, wastes cycles). Interrupts: hardware signals the CPU to run an ISR on an event (efficient, event-driven). DMA: a controller transfers data between peripheral and memory without CPU involvement (best for bulk/high-throughput transfers).
Compare Von Neumann and Harvard architectures.
Von Neumann uses a single shared bus/memory for instructions and data (simpler, but a bus bottleneck). Harvard uses separate instruction and data memories/buses, allowing simultaneous fetch of instruction and data (faster, common in DSPs and microcontrollers).
State the resolution (LSB voltage) of an $n$-bit ADC with reference $V_{ref}$.
$V_{LSB} = \dfrac{V_{ref}}{2^{n}}$. For example a 12-bit ADC with $V_{ref}=3.3\ \text{V}$ has $V_{LSB} = \dfrac{3.3}{4096} \approx 0.806\ \text{mV}$.
Define accuracy, precision and resolution for a measurement instrument.
Accuracy: closeness of a measurement to the true value (relates to systematic error). Precision: repeatability/closeness of repeated readings to each other (relates to random error). Resolution: the smallest change the instrument can detect or display.
How is a combined standard uncertainty propagated for $y = f(x_1,\dots,x_n)$ with uncorrelated inputs?
$u_{c}(y) = \sqrt{\sum_{i} \left(\dfrac{\partial f}{\partial x_{i}}\right)^{2} u^{2}(x_{i})}$. For products/quotients the relative uncertainties add in quadrature; for sums the absolute uncertainties add in quadrature. Expanded uncertainty $U = k\,u_{c}$ with coverage factor $k$ (commonly $k=2$ for $\approx95\%$).
Distinguish Type A and Type B uncertainty evaluation (GUM).
Type A uncertainty is evaluated by statistical analysis of repeated observations (e.g. standard deviation of the mean). Type B is evaluated by other means: manufacturer specs, calibration certificates, prior data, or assumed distributions.
What is a Wheatstone bridge used for and its balance condition?
It measures an unknown resistance (often from a strain gauge or RTD) by comparing ratios. Balance (zero galvanometer/bridge output) occurs when $\dfrac{R_{1}}{R_{2}} = \dfrac{R_{3}}{R_{x}}$, i.e. $R_{1}R_{x} = R_{2}R_{3}$.
Define a transducer and give examples of common sensor types and their measurands.
A transducer converts one form of energy/physical quantity into another (usually into an electrical signal). Examples: thermocouple (temperature, Seebeck EMF), strain gauge (force/strain via resistance change), piezoelectric (pressure/acceleration), LVDT (displacement), photodiode (light).
State the relationship between memory hierarchy levels by speed and the principle behind caching.
Hierarchy (fastest/smallest to slowest/largest): registers, L1/L2/L3 cache, main RAM, SSD/disk. Caching exploits locality of reference: temporal (recently used data reused soon) and spatial (nearby addresses accessed soon).
What is pipelining in a CPU and what hazards limit it?
Pipelining overlaps execution stages (fetch, decode, execute, memory, write-back) so several instructions are in flight, raising throughput. Hazards: structural (resource conflict), data (operand dependency), and control (branches). Mitigated by forwarding, stalls and branch prediction.
Compare the ACID properties of databases with the CAP theorem.
ACID = Atomicity, Consistency, Isolation, Durability (transaction guarantees, classic RDBMS). CAP theorem: a distributed system can guarantee at most two of Consistency, Availability, Partition tolerance simultaneously; under a partition you choose C or A.
Give Big-O time complexity of binary search, quicksort (average), and bubble sort.
Binary search: $\mathcal{O}(\log n)$. Quicksort average: $\mathcal{O}(n\log n)$ (worst $\mathcal{O}(n^{2})$). Bubble sort: $\mathcal{O}(n^{2})$.
List the SOLID principles of object-oriented software design.
Single-responsibility, Open/closed, Liskov substitution, Interface segregation, Dependency inversion. They aim for maintainable, loosely-coupled, extensible code.
Compare the seven-layer OSI model with the four-layer TCP/IP model.
OSI: Physical, Data Link, Network, Transport, Session, Presentation, Application. TCP/IP: Link (Network Access), Internet, Transport, Application. TCP/IP collapses OSI's top three layers into Application and its bottom two into Link.
Contrast TCP and UDP transport protocols.
TCP is connection-oriented, reliable, ordered, with flow/congestion control and error recovery (used for web, email, file transfer). UDP is connectionless, unreliable, low-overhead and low-latency (used for streaming, VoIP, DNS, gaming).
State the CIA triad of cyber security and define each element.
Confidentiality: information accessible only to authorised parties (encryption, access control). Integrity: data is accurate and unaltered (hashing, checksums, digital signatures). Availability: systems/data are accessible when needed (redundancy, DDoS protection).
Distinguish symmetric and asymmetric (public-key) cryptography, with an example of each.
Symmetric uses one shared secret key for encryption and decryption (fast; e.g. AES). Asymmetric uses a public/private key pair, encrypting with one and decrypting with the other (enables key exchange and digital signatures; e.g. RSA, ECC). TLS uses asymmetric to exchange a symmetric session key.
Differentiate supervised, unsupervised and reinforcement learning, and state the bias-variance tradeoff.
Supervised: learns from labelled input-output pairs (classification, regression). Unsupervised: finds structure in unlabelled data (clustering, dimensionality reduction). Reinforcement: an agent learns a policy by maximising reward through interaction. Bias-variance tradeoff: high bias underfits, high variance overfits; total error $\approx \text{bias}^{2} + \text{variance} + \text{irreducible noise}$.
State Euler's identity / formula linking complex exponentials and trigonometry, used throughout AC and signal analysis.
Euler's formula: $e^{j\theta} = \cos\theta + j\sin\theta$. Special case (Euler's identity): $e^{j\pi} + 1 = 0$. This underpins phasor analysis and Fourier methods.
Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering FAQ
What is in the Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering syllabus?
Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering is split into 4 chapters: Electrical Engineering Fundamentals, Electronic Engineering and Devices, Information Technology, Software and Communications and Underpinning Mathematics, Science and Emerging Technology. Together they contain 18 topics and 31 sub-topics.
How many chapters are in Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering?
4 chapters, containing 18 topics and 31 sub-topics. The largest chapter is Electronic Engineering and Devices, with 5 topics.
Are there flashcards for Chartered Membership of the IET (CEng MIET) Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering?
Yes — a 51-card Knowledge and Understanding (UK-SPEC A) for Electrical, Electronic and IT Engineering deck, printed in full in the flashcards section of this page and available in the Examius app with spaced repetition. The free plan covers one exam of your choice, including its flashcards; Examius Pro, a one-time purchase, unlocks every other exam and deck.